A wafer for a semiconductor device as a substrate (hereinafter, a “wafer”) is processed with a predetermined process such as, for example, a plasma process in a depressurized processing chamber of a substrate processing apparatus. The wafer is electrostatically adsorbed by an electrostatic chuck disposed in the processing chamber so as not to deviate from a desired position during the predetermined process.
The electrostatic chuck is a planar member made of a high-resistance dielectric material such as, for example, ceramics having an electrostatic electrode plate therein, and the wafer is placed on the upper surface of the electrostatic chuck. When a DC power source is connected to the electrostatic electrode plate to supply a positive DC voltage, a negative potential is generated on the surface of the electrostatic chuck side (hereinafter, a “rear surface”) of the placed wafer, and thus a potential difference is generated between the electrostatic electrode plate and the rear surface of the wafer. However, since the dielectric material of the electrostatic chuck presents between the electrostatic electrode plate and the wafer, electric charges do not move between the electrostatic electrode plate and the wafer, and thus, the potential difference is maintained therebetween. As a result, the wafer is electrostatically adsorbed at the electrostatic chuck by an electrostatic force caused by the potential difference.
An upper electrode plate with a ground potential is disposed so as to face the electrostatic chuck in the processing chamber of the substrate processing apparatus. Since there exists plasma 51 always between a wafer W and an upper electrode plate 50 when a plasma process is performed for wafer W in the substrate processing apparatus, as shown in FIG. 5A, the electric charges between wafer W and upper electrode plate 50 freely move by the electrons or the cations in plasma 51. As a result, even though the potential of an electrostatic electrode plate 52 (represented by “HV” in the drawings) in an electrostatic chuck 53 is set to, for example, 2.5 kV, the potential of wafer W (represented by “Wafer” in the drawings) becomes the same ground potential as the potential of upper electrode plate 50 (represented by “UEL” in the drawings), that is, 0 V.
Meanwhile, since the dielectric material of electrostatic chuck 53 has a high resistance, ideally, the electric charges do not move between a wafer placing surface 53a which is the surface of electrostatic chuck 53 and electrostatic electrode plate 52. However, some of the electric charges may move by, for example, a continuous usage at a high temperature or a process condition. However, since the dielectric material of electrostatic chuck 53 still has a high resistance, the movement of the electric charges between wafer placing surface 53a and electrostatic electrode plate 52 is suppressed, and thus, only a few of the electric charges move. Moreover, the moving speed of the electric charges is very slow and the electric charges hardly move after the few electric charges have moved. As a result, the potential difference may be maintained between electrostatic electrode plate 52 and wafer placing surface 53a. Accordingly, when the potential of electrostatic electrode plate 52 and the potential of wafer placing surface 53a (represented by “Surface” in the drawings) are the ground potential (0 V) when, for example, wafer W is placed on electrostatic chuck 53, for example, when a DC voltage having a potential of 2.5 kV is applied to electrostatic electrode plate 52 to change the potential of electrostatic electrode plate 52 into 2.5 kV, the potential of wafer placing surface 53a is also changed from 0 V to, for example, 0.5 kV, but no more. As a result, an absolute value of the potential difference between electrostatic electrode plate 52 and wafer placing surface 53a is maintained at 2.0 kV.
However, in order to easily remove wafer W from electrostatic chuck 53 after the plasma process, for example, it has been proposed recently that voltage having an opposite polarity to the applied voltage during the plasma process is applied to electrostatic electrode plate 52 (see, for example, Japanese Patent Application Laid-Open No. H04-230051) or that the potential of electrostatic electrode plate 52 is changed to 0 V.